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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Santa Clara, California, United States +1 location
… multi-die technologies and come up with innovative solutions to address packaging, interconnect, physical design, electrical and thermal challenges. Analyze peak current, Di/Dt, IR and EM requirements, and collaborate …
Kanata, Ontario, Canada
Pay posted by employer$162,300–$234,800
… You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia …
Ottawa, Ontario, Canada
… component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell DSP’s. These components are made operational with a highly functional embedded firmware. The …
Hillsboro, Oregon, United States +4 locations
Pay posted by employer$220,920–$311,890 USD per year
… Position Overview As our silicon team grows, we are seeking a front-end silicon lead to manage both the design and verification of our neuromorphic chiplets and IP. This principal-level role calls for a talented …
Limerick, Munster, Ireland
… change within the organization. This role requires someone who is eager to engage with hardware/software co-design, embedded systems, and the development process, while also being comfortable working with both technical …
Maynard, Massachusetts, US
Pay posted by employer$192,400–$275,800
… (SOC) architectures. In this high-impact technical leadership role, you will: Lead end-to-end architecture, design, and implementation of high-reliability, low-latency embedded firmware for multi-core microcontrollers (ARM …
Santa Clara, California, United States
… chip designs from plan of record through production release. This role sits at the junction of chip design, manufacturing test, and product quality, and is accountable for getting our silicon test-ready, …
San Jose, California, United States
Pay posted by employer$214,100–$309,800
… a sufficient number of applications are received. Meet the Team Cisco Silicon One is the center of Cisco’s ASIC design and is driving the development of next-generation network devices for the AI/ML era. Our outstanding …
Santa Clara, California, United States
… boot, measured boot, hardware root of trust, cryptography, CPU security architecture, and SoC security design. You will also help build and apply AI assisted tools that improve how security architecture work is done, …
Santa Clara, California, United States
The Silicon Co-Design Group is hiring a Voltage Noise Co-Design Lead to architect and deliver di/dt mitigation across silicon, …
Mexico City, Mexico
… with the same rigor as consumer-facing apps. You will advocate for self-service capabilities, API-first design, and world-class documentation. What We Are Looking For Global Scale Mastery: You have led product …
RTP, North Carolina, US
Pay posted by employer$151,600–$222,400
… a sufficient number of applications are received . Meet the Team Cisco Silicon One is the center of Cisco’s ASIC design and is driving the development of next-generation network devices for the 5G and AI era. Our …
Santa Clara, California, United States
… component platforms with high-speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell DSP’s. These components are made operational with a highly functional embedded firmware. The …
Santa Clara, California, United States
… process technology — from 5nm through 3nm FinFET and into 2nm GAAFET. With deep expertise across digital design, design verification, physical design, DFT, and silicon validation, the group operates with the rigor and …
Santa Clara, California, United States
… reliability, silicon operations, manufacturing, and collaborators outside the company to ensure strong design-to-test alignment. Lead the strategy for ATE platform selection, vendor engagement, capacity readiness, and …
Adliswil, Zurich, Switzerland
… electrical interfaces for next-generation optical engines (400G/lane CPO and beyond) Perform co-design across photonics, analog/ASIC design, and packaging teams to optimize performance, power efficiency, and …
Santa Clara, California, United States +1 location
… test engineering strategy, equipment/vendor selection, and manage test hardware suppliers Drive loadboard design strategy including schematic, layout, SI/PI, and simulation capabilities Manage NPI and production hardware …
Bengaluru, Karnataka, India
We are looking for a Principal System Software Architect to join our HW/SW Co-Design team. This is not a role about drawing abstract boxes on slides -- it is about making real, data-driven …
San Jose, California, United States
Pay posted by employer$186,900–$267,700
… a sufficient number of applications are received. Meet the Team Cisco Silicon One is the center of Cisco’s ASIC design and is driving the development of next-generation network devices for the AI/ML era. Our outstanding …
Santa Clara, California, United States
… and tooling: version planning, regression and quality gates, migration paths, and user adoption across design teams Collaborate with engineering teams to define requirements and document architecture, interfaces, and …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
