1,000+ matching jobs for “Design Verification Engineer”
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… power the future of the digital world. You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and …
… develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical …
… team and see how you can make a lasting impact on the world. We're looking for a talented, motivated Senior Design Verification Engineer to join our GPU memory subsystem team in Durham, NC. Looking to join a dynamic team solving complex …
Pay posted by employer$121,900–$195,000 USD per year
… to low power and most advanced wireless solutions as examples. Responsibilities Develop and execute verification plans for IP blocks at both block and system levels Build and maintain System Verilog /UVM-based …
… ensuring robust test infrastructure for cutting-edge hardware solutions. Our team collaborates closely with design and product development teams, playing a pivotal role in the integration and validation of test logic …
Pay posted by employer$105,698–$105,702 USD per year
At Intel, the Design Verification Engineer Graduate Intern role offers an exciting opportunity to contribute to the functional verification of silicon …
… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …
Summary The individual will be responsible for performing Verification activities for Life Support Systems (LSS) products. Responsibility also includes carrying out all the …
… inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at NVIDIA …
… from scratch. Maintain and improve existing DV environments. Develop test plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and advised stimulus. Ensure …
Summary The Control & Protection Verification and Validation Engineer supports the design and implementation of HVDC Control and Protection Systems by …