287 matching jobs for “SoC Design Verification Engineer”
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… Server and Client products. The manager will own end-to-end execution of the MEU cluster across RTL Design, Design Verification, and Formal Verification, driving feature development from architecture definition …
We are seeking an experienced, hands-on Senior Digital Design Manager to lead digital IC development for cutting-edge optical control ICs in AI data center and cloud …
… of computers, robots, and self-driving cars that can understand the world. We are now looking for Physical Design Engineer in Shanghai/Beijing office. What you will be doing: A role in physical design for NVIDIA GPU and …
We are seeking a highly experienced and motivated Senior Technical Lead - CPU Physical Design to lead the physical implementation of next-generation CPU IPs from floorplanning through signoff. The …
Summary We are seeking an experienced Lead Electrical Systems Engineer to lead the design, development, architecture, integration, verification and lifecycle support of complex …
… what’s never been done before takes vision, innovation, and the world’s best talent. We are now looking for Design Automation Tool development Engineers for our Tegra SOC development group. As the Lead, you will be …
NVIDIA is seeking a highly motivated DFT Engineer to join our silicon engineering team. In this role, you will work closely with Design, Test, CAD, and …
The Role and Impact As an Emulation Engineer, you will play a critical role in advancing pre-silicon verification processes by developing and enhancing …
… fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Principal Engineer-DFT with Marvell, you’ll be a member of the Connectivity business group. Connectivity solutions from …
… with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center of …
Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, …
Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, …
Pay posted by employer$153,910–$217,280 CAD per year
The Role and Impact Join Intel's cutting-edge team as a Formal Verification Engineer, where you will play a pivotal role in ensuring the quality and reliability of our next-generation …
We are now looking for a Senior JTAG Methodology Engineer! As a Senior JTAG Methodology Engineer, you will architect and develop the test methodologies that make our …