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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Armenia
… ATE screening, in-system testing, debugging, and diagnostics. We collaborate closely with design, design-verification, and product development teams to integrate and validate test logic throughout implementation and …
Toronto, Ontario, Canada
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next …
Bengaluru, Karnataka, India +1 location
… power management architecture of next generation chips. One should possess strong digital design and verification fundamentals. What you'll be doing: As a designer, be responsible for making architectural trade-offs based …
Santa Clara, California, United States
… the team and see how we can make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2026. We continue to rapidly grow the research and development of …
Santa Clara, California, United States
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next …
San Jose, California, United States +2 locations
Pay posted by employer$143,800–$230,000 per year
Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, …
San Jose, California, United States +2 locations
Pay posted by employer$143,800–$230,000 per year
Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, …
Santa Clara, California, United States +1 location
… interconnect/cache/core design is desirable. Verilog expertise is preferred as is a deep understanding of ASIC design flow including RTL design and verification, DFT, and ECO. Strong communication and interpersonal …
Santa Clara, California, United States
… never been a more exciting time to join our team! The NVIDIA VLSI team is looking for a Cell Modeling and Verification Engineer with strong experience in hardware design and methodologies to help develop NVIDIA's ground …
USA - El Segundo, CA
Pay posted by employer$98,600–$133,400
… and ECO implementation Ensure clean netlist handoffs and predictable convergence by partnering with RTL, verification, DFT, and backend partner companies Support chip‑level integration, top‑level timing closure, signoff …
Bengaluru, Karnataka, India +1 location
… integration with the testability features coordinated in the RTL. * Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation …
USA-Mendota Heights-Northland
Pay posted by employer$109,700–$175,500 USD per year
Senior Digital / Mixed-Signal IC Design or Verification Engineer Location: Mendota Heights, MN or Broomfield, CO Job Description Summary Join Broadcom, a global …
San Jose, California, United States
Pay posted by employer$125,700–$203,100
… more, and work quickly. Join us to power the future of the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. …
Santa Clara, California, United States +1 location
… join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want to challenge …
San Jose, California, United States +2 locations
Pay posted by employer$186,900–$267,700
… the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with Front-end RTL …
Bengaluru, Karnataka, India
… RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. Responsible for thorough test planning and development of test benches to verify comprehensive …
China, Shanghai
We are now looking for Chip Design Engineer for the Switch Silicon group. As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a …
USA - El Segundo, CA +1 location
Pay posted by employer$98,600–$133,400
… systems, advancing U.S. leadership in space while amplifying human creativity and intelligence. As a Boeing engineer, you’ll join a diverse, collaborative team solving high‑impact challenges in complex semiconductor design. …
Austin, Texas, United States
… Science, Computer Engineering, Electrical Engineering or related degree. Exposure to computer architecture, ASIC design, or verification methodology is required. Familiarity with Object Oriented programing and/or …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
