Intel
GPU Logic Design Engineer
Bengaluru, Karnataka, India
The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly …
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SoC Design Verification Engineer · AnywhereEdit
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272 matching jobs for “SoC Design Verification Engineer”
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Nvidia
Senior Verification Engineer – High Speed Coherent Interconnect Hub
Santa Clara, California, United States
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next …
Nvidia
ASIC Verification Engineer - New College Grad 2027
Santa Clara, California, United States
… Come join the team and see how we can make a lasting impact on the world. We are seeking to hire a ASIC Verification Engineer - New College Grad 2027 to contribute to the design verification activities that support the …
Nvidia
Senior ASIC Design Engineer
Santa Clara, California, United States +1 location
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity …
Intel
Physical Design Clocking Engineer
Santa Clara, California, United States
Pay posted by employer$105,650–$149,150 USD per year
As a Physical Design Engineer, you will play a critical role in the implementation of custom IP and SoC designs, transforming …
Broadcom
Lead ASIC Design Engineer
San Jose, California, United States
- Full time
- Regular
Pay posted by employer$143,800–$230,000 per year
We are seeking a hands-on Principal Digital Design Engineer to serve as the Chip Lead for our next-generation silicon projects. In this high-impact role, you …
Nvidia
ASIC Design Engineer - Performance Monitoring
Bengaluru, Karnataka, India
NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold …
Micron Technology
STAFF ASIC Design Engineer
Hsinchu - Chang Yih, Taiwan
Design, implement, and debug complex logic designs. Integrate your IP into larger and more complex IPs. Support …
Cisco Systems
ASIC Physical Design Engineer
Armenia
… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …
Nvidia
Senior ASIC Design Engineer - DFT
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer to join our DFT team! NVIDIA has continuously reinvented itself over two decades. Our invention of …
Analog Devices
Staff Engineer, Digital Design Engineering
China, Beijing, Haidian, Xixiaokou
… RTL development, synthesis, timing closure, DFT collaboration, and close partnership with physical design teams to deliver robust, production‑ready designs. Key Responsibilities: Define and develop system-level …
Intel
GPU Logic Design Engineer
Bengaluru, Karnataka, India
The Role and Impact : As a GPU Logic Design Engineer, you will play a pivotal role in developing and optimizing the RTL design for cutting-edge …
Nvidia
Senior Physical Design Engineer
Westford, Massachusetts, United States
… and see how you can make a lasting impact on the world. NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high …
Broadcom
Digital Design RTL Engineer
Fort Collins, Colorado, United States +1 location
- Full time
- Regular
Pay posted by employer$121,900–$195,000 USD per year
… SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical …
Nvidia
ASIC Clocks Verification Engineer - New College Grad 2026
Santa Clara, California, United States
… Make the choice to join us today. The GPU clocks group is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team collaborates with the …
Micron Technology
Principal Engineer, ASIC Design
San Jose, California, United States
Pay posted by employer$198,000–$336,000 per year
Design, implement, and debug complex RTL logic and integrate IP into larger subsystems Support front-end design …
Intel
GPU Logic Design Engineer
Folsom, California, United States +1 location
Pay posted by employer$141,910–$200,340 USD per year
As a GPU Logic Design Engineer at Intel, you will play a critical role in shaping the future of graphics and compute …
Nvidia
Senior Mixed-Signal Design Engineer
Santa Clara, California, United States
We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the …
Intel
IP RTL Senior Design Engineer
Bengaluru, Karnataka, India
The Role and Impact: As an IP Logic Design Engineer, you will play a pivotal role in developing high-quality intellectual property (IP) for Unified …
Intel
GPU Senior Logic Design Engineer
Bengaluru, Karnataka, India
GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation …
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