Intel
GPU Senior Logic Design Engineer
India, Bangalore
GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform …
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Senior Chip Design Verification Engineer · AnywhereEdit
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145 matching jobs for “Senior Chip Design Verification Engineer”
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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Nvidia
Senior Verification Engineer – High Speed Coherent Interconnect Hub
Canada, Toronto
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that …
Nvidia
Senior Verification Engineer – High Speed Coherent Interconnect Hub
US, CA, Santa Clara
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that …
RTX
Senior Electrical Engineer - ASIC/FPGA Verification (Onsite)
Cedar Rapids, Iowa, United States
… Join us and help shape the future of aerospace and defense. We are seeking an experienced and driven Senior Electrical or Computer Engineer to play a key role in the design, implementation, and verification of …
Broadcom
Senior Memory Circuit Design Engineer
Bengaluru, India
- Full time
- Regular
Analyze different memory architectures and highlight the tradeoffs Design and build memory or circuit blocks at the gate or transistor level Simulate and analyze the circuit design …
RTX
Senior FPGA Design Engineer (Hybrid)
US-PR-AGUADILLA-110 ~ Rd 110 N Km 28.8 ~ RD110
Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration Recommend new tools and practices for …
RTX
Senior ASIC/FPGA Verification Engineer (Onsite)- Active Secret
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… shape the future of aerospace and defense. Collins Aerospace is seeking a highly skilled and innovative Senior ASIC/FPGA Verification Engineer to join our Applied Research and Technology (ART) Microelectronics …
Nvidia
Senior SOC Design Engineer - Networking Group
India, Bengaluru
We are currently seeking an expert SOC Design and Integration Engineers with strong design fundamentals to work in Networking chip design group. You'll …
Intel
Senior CPU RTL Design Engineer
US, Texas, Austin +1 location
Pay posted by employer$164,470–$311,890 USD per year
… laptops, as well as data center solutions and many other applications. As part of our team, you will help design the next generation of high-performance microprocessors. We are looking for a skilled individual who is …
Boeing
Experienced or Senior Digital Design Engineer
USA - Huntsville, AL
- In person
- Full time
- Regular
Pay posted by employer$112,200–$151,800
Design high speed digital circuits and perform signal integrity analysis Focus on electronic systems and …
Cisco Systems
Senior Physical Design Engineer - Signoff Methodology
Armenia
… role with four days per week at Cisco’s Yerevan office. Meet the Team You'll be joining our CAD Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development …
Nvidia
Senior ASIC Design Engineer – Clocks IP
US, CA, Santa Clara +1 location
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team …
KLA
Mechanical Design Engineer
Migdal Ha‘Emeq, Israel
- Full time
- Regular
… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and …
Nvidia
ASIC Physical Design Engineer
China, Shanghai
ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal …
Nvidia
CPU Design Methodology Engineer
US, OR, Hillsboro +3 locations
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. …
KLA
System Design Engineer
Milpitas, California, United States
- Full time
- Regular
Pay posted by employer$136,300–$231,700 per year
… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and …
Cisco Systems
ASIC Physical Design Engineer
Caesarea, Israel
Cisco Silicon One is seeking a Physical Design Engineer. Meet the Team The Physical Design team within Cisco Silicon One owns backend methodology and flow …
KLA
System Design Engineer
Milpitas, California, United States
- Full time
- Regular
Pay posted by employer$136,300–$231,700 per year
… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and …
Cisco Systems
Senior Physical Design CAD
Caesarea, Israel +1 location
Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One …
Boeing
ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior)
USA - Mountain View, CA
- In person
- Full time
- Regular
Pay posted by employer$119,850–$162,150
. You will work on leading‑edge ASICs used in space and aerospace systems—driving architecture, verification, tapeout readiness, silicon debug, and cross‑discipline integration with architecture, RTL, verification, …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.