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Santa Clara, California, United States
Pay posted by employer$164,470–$232,190 USD per year
… to strengthen Intel's leadership in the semiconductor industry. Position Overview As an IP Logic Design Engineer at Intel, you will play a pivotal role in developing high-quality IP blocks and subsystems for …
San Jose, California, United States
Pay posted by employer$154,900–$225,300
… high-performance security appliances, ensuring alignment with product roadmaps and architectural standards. Design Ownership: Architect and drive the creation of complex circuit designs, schematics, and PCB layouts, …
Bengaluru, Karnataka, India
… with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center of …
Bengaluru, Karnataka, India +1 location 3 postings
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test …
IND-Pune EON Kharadi Infrastructure
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test …
Bengaluru, Karnataka, India 2 postings
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test …
Durham, North Carolina, United States +1 location
Pay posted by employer$124,721–$180,602
… Together – Let’s stay ahead of what’s possible. We are seeking a motivated, Senior FPGA System Development Engineer for our Aerospace, Défense and Communication Business Unit. The goal of the FPGA Team is to develop and …
Spain, Valencia, Cortes Valencianas
Analog Devices Foundation IP group is seeking a senior Design Engineer to develop logic IPs (standard cells and IOs) to support analog, digital and mixed-signal SOC …
Hsinchu, Taiwan, Taiwan
• Drives the definition, architecture and design of high performance ASICs • Owns complex or multiple functional areas • Develops reusable code for future …
Annapolis Junction, MD
Pay posted by employer$112,800–$257,000
Security Engineer The Opportunity: We need a technical professional responsible for designing, building, and maintaining …
Bengaluru, Karnataka, India
… experience (role requirement). Own algorithm lifecycle activities: requirements interpretation, algorithm design, simulation, development, validation, and tuning , translating concepts into robust, production‑ready …
Bengaluru, Karnataka, India
… up, DFT architecture and Testability strategy, Timing and DFT Flow definition, Implementation, DFT / STA Verification and post-Si bring up. You'll work closely with other DFT / STA team members for DFT features …
USA - Coral Gables FL 33134 +2 locations
Summary The Security Operations Center (SOC) Engineer Role is designed to provide senior level leadership for the design, engineering, and …
Wilmington, Massachusetts, United States
Pay posted by employer$131,285–$190,108
We are seeking an experienced and technically exceptional Staff Engineer for a role as Digital ASIC Chip Architect and Signal Processing System Engineer to join a high-performing …
Bengaluru, Karnataka, India +1 location
… and see how you can make a lasting impact on the world. We are now looking for ASIC Flow and Integration Engineer to drive design methodology, automation, and integration for our High Speed IO team. What you'll be doing: …
Santa Clara, California, United States
… GPUs and SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. What you'll be doing: Build FPGA prototypes by making …
Santa Clara, California, United States
… impact on the world. Are you excited to build the automation infrastructure behind next-generation silicon design? We’re seeking a Senior VLSI Methodology Engineer to join our team and to design automation that powers …
Santa Clara, California, United States
… thrive, learn, and lead. Your Team, Your Impact Marvell is seeking a talented senior-level Power Integrity Engineer to join our Platform Engineering team, supporting board, switch, and optics development for next-generation …
Pune, Maharashtra, India
NVIDIA is seeking a highly motivated, creative system software engineer with strong embedded, kernel/driver, and security experience to join the GPU Software team in Pune, …
Bengaluru, Karnataka, India
… Within the BU, the Pre-Silicon Emulation team plays a critical role in program execution—bridging RTL design and real-world system behavior before a single chip is taped out. Our team owns emulation model …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
