Senior DFT Engineer · AnywhereEdit
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139 matching jobs for “Senior DFT Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

RTX

Senior Principal FPGA/ASIC Engineer (Onsite)

El Segundo, California, United States +1 location

… document and present one's work and status FPGA lab validation with advanced lab equipment Design for Test (DFT) and manufacturability issues Experience with Unix, scripting, C/C++, and/or Perl Proficiency using ASIC …

Added Oct 27, 2026

Cisco Systems

Senior ASIC Engineer - Post Silicon Validation

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… Join us to power the future of the digital world. Your Impact: In this role as a Post-Silicon Validation Engineer, you will be responsible for: Planning and setting up Silicon Bring-up infrastructure, including system …

Added Oct 31, 2026

RTX

Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

… us and help shape the future of aerospace and defense. We are seeking an experienced and highly motivated Senior Principal Electrical or Computer Engineer to support the design, development, and integration of advanced …

Added Oct 27, 2026

Nvidia

Senior Software R&D Engineer, ECO Route - VLSI EDA

Santa Clara, California, United States +1 location

… novel algorithms, parallel computing, machine learning, and high-performance C++. We are seeking a Senior Software R&D Engineer to invent the next generation of detailed physical design algorithms, with a focus on …

Added Oct 27, 2026

Cisco Systems

Structural Test Engineer

Hanoi, Hanoi, Vietnam +2 locations 3 postings

… multiple global sites. Design Influence: Represent structural test in high-level design reviews, setting DfT standards and negotiating probe access and coverage requirements to reduce risk in NPI and production. …

Added Oct 27, 2026

Analog Devices

Senior Digital Design

Philippines, Bonifacio Global City

The P3 Digital Design Engineer contributes to RTL design, subsystem implementation, and mixed - signal integration of digital logic blocks …

Added Nov 3, 2026

Marvell Technology

Principal Test Engineer

Singapore

  • Full time
  • Regular

… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a test development senior staff engineer in the Operations business group, you will test features on the silicon semiconductor chips …

Added Nov 3, 2026

Marvell Technology

Principal Test Engineer

Santa Clara, California, United States

  • Full time
  • Regular

… Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a test development principal engineer in the Operations business group, you will test features on the silicon semiconductor chips Marvell …

Added Nov 3, 2026

Marvell Technology

Sr. Staff Test Engineering Manager

Santa Clara, California, United States

  • Full time
  • Regular

… with significant growth potential. You will lead and collaborate closely with Product, Hardware, Design/DFT, and Firmware engineering teams to enable first-pass silicon success, accelerate time-to-market, and ensure …

Added Nov 3, 2026

Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

  • Full time
  • Regular

Pay posted by employer$143,800–$230,000 per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, …

Added Oct 5, 2026

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.

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