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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
China, Shanghai
… on making groundbreaking, impactful products. We are seeking a Senior Silicon Validation Methodology Engineer for Clocking and High-Speed I/O (PCIE, USB, MGBE, UFS etc) functional, you will own clocking and HSIO …
US-MI-Benton Harbor-Michigan (Whirlpool Corp R&E)
… customer on component placement and PCB size. Do layout design and high-speed interface guidelines, perform signal integrity, power integrity, and thermal analysis and review Gerber files. Testing Design sensor boards …
Santa Clara, California, United States
… a place to thrive, learn, and lead. Your Team, Your Impact Marvell is seeking a talented System Validation Engineer to join our Platform Engineering team, supporting board, switch, and optics development for next-generation …
Singapore, Singapore
R&D Hardware Design Engineer – Build the Future of Networking Are you passionate about cutting ‑ edge hardware design? Do you want your …
Weilburg, Germany
… for advanced semiconductor metrology systems. We are seeking a hands-on Senior Electrical Hardware Engineer with deep practical experience across the complete PCB design process—from requirements and architecture …
Roskilde, Zealand, Denmark
… testing efforts and lab work, collaborating with system architecture, optics, silicon, thermal, mechanical, signal/power integrity, and software teams. Driving product scalability, working with internal …
Bengaluru, Karnataka, India
… technology nodes (e.g., 22nm, 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine …
CLOSED-India, Bangalore, Aveda Meta
… technology nodes (e.g., 22nm, 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine …
Israel, Yokneam
NVIDIA Networking HW Qual teram is looking for a System Electrical Characterization and Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and …
Carlsbad, California, United States +1 location
Pay posted by employer$149,100–$218,100
… and work quickly. Join us to power the future of the digital world. Your Impact As a Senior Analog Layout Engineer on the Silicon One Optics team, you won’t just be drawing polygons—you’ll be architecting the physical …
Queretaro
Summary As a Advanced Lead Digital Design Engineer, you will be at the forefront of designing cutting-edge embedded systems for aerospace applications, …
United States-Utah-Roy
Pay posted by employer$98,400–$147,600
… with internal and external stakeholders. The candidate will demonstrate a commitment to ethics and integrity, and the capability to innovate. They will have the ability to operate in a team environment and …
Santa Clara, California, United States
We are now looking for a Senior High-Speed IO (HSIO) Validation Engineer to join our hardware product team! This is an outstanding opportunity to work with next-generation GPU, CPU …
Burlington, Vermont, United States +2 locations
… Computing (HPC), Artificial Intelligence (AI), and networking solutions. The team focuses on signal integrity, power integrity, thermal integrity, mechanical integrity, processability, manufacturability, and …
Chennai, Tamil Nadu, India +1 location
… to EV transmission system • Perform the analysis and suggest the design improvements to expert engineer for approval. • Meshing and Simulation for stiffness, strength and durability calculations of …
Santa Clara, California, United States +2 locations
… environments. Strong understanding of electrical engineering fundamentals relevant to VLSI package design (signal integrity, power delivery, parasitic extraction, or equivalent). Ways to stand out from the crowd: Good …
Somerset, New Jersey, United States +1 location
Pay posted by employer$116,960–$160,820
As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC …
IND19-01-Bengaluru-EPIP 122 (Phase II)
… data, conduct experimental tests & evaluate results. Common skill sets include Analog, Digital, Mixed Signal, HMOS/MOS/CMOS, PLL, ADC, DAC etc. Broadening knowledge of own technical discipline to execute …
Beijing, Beijing, China
… or PhD in CS, EE, Biomedical Engineering, Medical Physics, Applied Math, or related field Strong math and signal processing foundation (linear algebra, optimization, Fourier/sampling theory) Proficient in modern C++ with …
Santa Clara, California, United States +5 locations
… problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This position will …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
