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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Hillsboro, Oregon, United States +3 locations
… demand in a footprint that is responsible to our environment. The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be …
Singapore-Yishun
Job Description 1. R&D engineer position available in design and physical implementation of high-performance System-On-Chip ASICs. Key …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
Principal Physical Design Engineer — ASIC Products Division (APD) Location: San Jose, CA Position Type: Full-Time Who We Are — Physical Design …
Ottawa March Road
Pay posted by employer$114,400–$183,000 CAD per year
As a Principal Mechanical Engineer, you will design, develop, and deliver Mechanical assemblies, including full chassis design for Ultra …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
As a Principal Hardware Engineer, you will be the technical lead responsible for a design team developing and delivering …
Bengaluru, Karnataka, India
Principal Digital DFT Engineer Role Summary The Principal Digital DFT Engineer is responsible for architecting, implementing, and …
Milpitas, California, United States
Pay posted by employer$155,000–$222,600
… is expected to close on: 11/26/2026 Meet the team We are seeking an experienced and motivated Software Engineer to join our Service Provider High End Router (Cisco 8000) team within the R&D department, contributing to …
San Jose, California, United States
Pay posted by employer$120,000–$192,000 per year
The CSG group at Broadcom has brought some of the most complex and cutting edge networking ASIC's and multichip solutions to market over the last decade. The group develops Tomahawk ASICs for Scale-Out …
Belgrade, Central Serbia, Serbia
… with software development teams on application design and development as well as the Hardware and ASIC design teams across various Cisco locations. Identify bottlenecks and bugs, and devise solutions to these …
Schaumburg, Illinois, United States
Pay posted by employer$100,100–$160,200 USD
… frequency range, such as atmospheric absorption, high path loss, and tight manufacturing tolerances. Custom ASIC Development: Collaborate with our RF ASIC team on development of beamformer IC’s Customer Technical …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… architecture and design through production and sustainment. The MPD department is seeking a Principal FPGA Engineer to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions …
Beersheba, Southern District, Israel +1 location
… Engineering/Communication Engineering/Computer Engineering 5+ years of proven experience in RTL Frontend ASIC Verification (Chip Design) High Level of English Ways to stand out from the crowd: Extensive experience in …
Santa Clara, California, United States
… data economy, whether deployed at the network core or the edge. What You Can Expect The Principal Hardware Engineer will lead the design of these boards from concept through production, working on custom ASIC solutions …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
Principal Physical Design Engineer — ASIC Products Division (APD) Location: San Jose, CA Position Type: Full-Time Who We Are — Physical Design …
Tucson, Arizona, United States
… over the world, from the ground to exoatmospheric environments and into space. As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and …
Armenia
… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… more, and work quickly. Join us to power the future of the digital world. Your Impact Develop and maintain ASIC APIs and SDKs in C and C++, delivering clean, scalable updates that support emulation, bring-up, and …
Singapore-Yishun
Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and RF/microwave …
Bengaluru, Karnataka, India
… bring-up speed, and ultimately what the product delivers in the field. We are hiring a Senior Silicon Power Engineer to own power-feature productization on a flagship silicon program. This is not a coordination role, and it …
Bengaluru, Karnataka, India 3 postings
NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
