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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Santa Clara, California, United States +3 locations
… itself over two decades, inventing the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our engineering teams worldwide. You …
Bengaluru, Karnataka, India
… in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will …
Austin, Texas, United States +1 location
… as well as its largest total available market opportunity. We are now looking for a highly motivated engineer to join this dynamic and innovative platform verification team. In this role, you will apply your RTL …
Israel, Yokneam +1 location
… out from the crowd: Knowledge in PCI Express standard. Validated experience in Verification or RTL Frontend ASIC Design (Chip Design). Background in Specman/ UVM. Background in RTL uArch & coding. NVIDIA has some of the …
Santa Clara, California, United States +5 locations
… in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will …
Fort Collins, Colorado, United States
Pay posted by employer$61,900–$99,000 USD per year
… methodology development to address challenges of designing in deep submicron processes and state-of-the-art ASIC design for AI, computing and networking products Qualifications: Requirements Bachelors in …
Bengaluru, Karnataka, India
… automation. Solid understanding of digital design fundamentals, RTL coding, Lint/CDC, Low Power Checks and ASIC design flow. Excellent problem-solving skills and ability to work effectively in a team-oriented …
Santa Clara, California, United States +2 locations
… the validation of chip features and lead debug of observations on Silicon. Work multi-functionally with ASIC, SW, System, Characterization and ATE teams to accomplish your tasks. What we need to see: BS or MS in EE, …
Santa Clara, California, United States
… Planning and quality to root-cause and solve technical problems. Have the opportunity to influence future ASIC designs to improve test coverage and enable better product yield, test time, silicon bring-up and releases. …
Austin, Texas, United States
… as well as its largest total available market opportunity. We are now looking for a highly motivated engineer to join this dynamic and innovative platform verification team. In this role, you will apply your RTL …
Ottawa March Road
Pay posted by employer$76,300–$122,000 CAD per year
As a Mechanical Design Engineer, you will design, develop, and deliver mechanical assemblies, including full chassis design for …
San Jose, California, United States
Pay posted by employer$101,000–$162,000 USD per year
As a Mechanical Design Engineer, you will design, develop, and deliver mechanical assemblies, including full chassis design for …
Melbourne, Florida, United States
… market. Join us and help shape the future of aerospace and defense. We are looking for a Senior Electrical Engineer - FPGA to join our team in Melbourne, FL. This position will work closely with our Avionics teams to meet …
Israel, Yokneam
NVIDIA Networking IC Product Engineering team is looking for a Post Si Characterization and Validation engineer, to take part of Network ASIC, SOC and SiPh ICs characterization efforts of speed, logic, memory, power and …
McKinney, Texas, United States
As the Principal RF Engineer , you will provide technical expertise in the analysis, design, fabrication, test, and integration of …
Bengaluru, Karnataka, India
… OSPF, VXLAN, EVPN, QinQ, and multicast Test and verify SAI (Switch Abstraction Interface) integration and ASIC driver behavior Automate functional, regression, scale, and performance test cases using Python and Robot …
Santa Clara, California, United States +1 location
… lead. Your Team, Your Impact Marvell is seeking a highly motivated and experienced Principal Board Product Engineer to lead board-level product engineering activities from prototype through volume production. This role will …
Hanoi, Hanoi, Vietnam
… networking knowledge (IP/MAC address, netmask, etc.). Knowledge of hardware architecture/components (CPU, ASIC, firmware vs OS). Debug/troubleshooting expertise and manufacturing test operations experience. Familiarity …
Hanoi, Hanoi, Vietnam
… networking knowledge (IP/MAC address, netmask, etc.). Knowledge of hardware architecture/components (CPU, ASIC, firmware vs OS). Debug/troubleshooting expertise and manufacturing test operations experience. Familiarity …
Hsinchu, Taiwan, Taiwan +1 location
… life’s work, to amplify human creativity and intelligence. We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
