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Phoenix, Arizona, United States +2 locations
Pay posted by employer$141,910–$269,100 USD per year
… join us and do something wonderful. The Aerospace, Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel Foundry Services customers on our PDKs, DFT/DFM insertion, ATPG …
Israel, Tel Aviv
NVIDIA is looking for a best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed …
Malaysia, Penang
… • Knowledge of EMI/EMC design techniques and compliance requirements. • Familiarity with FPGA, CPLD, ASIC, and Intel platform architectures. • Experience with DFM, DFT, and reliability methodologies. • Knowledge …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
… developing Test plans, Functional coverage and pseudo-random testing Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification leading a Core Very …
Santa Clara, California, United States +4 locations
NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our GPU Memory Subsystem IP verification Team! At NVIDIA, we have crafted a team of outstanding people …
Bengaluru, Karnataka, India
… NVIDIA is increasingly known as “the AI computing company.” What you’ll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… from architecture and design through production and sustainment. The MPD department is seeking an FPGA Engineer II to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions …
San Jose, California, United States +3 locations
Pay posted by employer$143,800–$230,000 USD per year
… technologies is highly preferred. Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must. Additional Requirements: Good problem solver. Self starter who can work …
Santa Clara, California, United States
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India 4 postings
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Malaysia, Penang 2 postings
… talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing …
Irvine, California, United States +1 location
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the …
Santa Clara, California, United States
… exciting time to join our team! The NVIDIA VLSI team is looking for a Senior Cell Modeling and Verification Engineer with strong experience in hardware design and methodologies to help develop NVIDIA's ground breaking ASIC …
Santa Clara, California, United States
Are you passionate about DGX systems connecting multiple ASIC chips together, FPGA prototyping, and hardware emulation? Are you interested in pushing the boundaries of …
United Kingdom, Edinburgh, SC, Freer +2 locations
… planning, implementation, execution, and release of products to customers. The Design Verification Engineer will collaborate with the wider ADI technical community which affords an opportunity to work with many …
Bengaluru, Karnataka, India +1 location
… or Master’s in Electrical/Electronics Engineering or related discipline. 5+ years of hands-on experience of ASIC/SoC physical design at advance nodes such as 40,28,22,16 etc. Strong proficiency in floorplanning, PNR, …
Bengaluru, Karnataka, India
… latest process node technologies is also part of the work. Join this dynamic team as a Senior System Perf Engineer, and help craft the future of computing in Bengaluru. What you'll be doing: Lead the productization of …
Bengaluru, Karnataka, India
GPU Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
