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Santa Clara, California, United States +1 location
… world. This is our life’s work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone …
As a Physical Layer Firmware Architecture Engineer at NVIDIA, you will undertake an outstanding role to build the future of computer graphics, AI, and …
… integrating microprocessor cores, memory subsystems, or complex digital IP blocks. Familiarity with ASIC design flows, including synthesis and static timing analysis. Additional Compensation and Benefit Elements …
Santa Clara, California, United States +1 location
… adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will be responsible for …
… SoC’s. Must have firsthand experience & solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & …
… and lead. Your Team, Your Impact Marvell is looking for highly motivated, talented Senior Principal Test Engineer. You will part of a dynamic Test engineering team (Core Test Technology Group) working on most advanced …
The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly to the …
… creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling …
… human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a growing and …
Santa Clara, California, United States +1 location
… delivery circuits in state-of-the-art sub-micron CMOS technologies using Cadence tools You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. Job duties will include …
… human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a growing and …
… with industry-standard EDA tools for package or PCB design. Preferred Qualifications • Experience in ASIC package design, PCB design, or related high‑speed hardware development. • Experience with SI/PI concepts …
Santa Clara, California, United States +1 location
Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling high-speed …
… and lead. Your Team, Your Impact Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure …
… shaping Cisco's ground-breaking solutions by design ing, developing, and test ing some of the most complex ASIC s being developed in the industry. The Cisco Service Provider Routing Hardware Engineer ing team develops …
Santa Clara, California, United States +1 location
We’re looking for a Senior Power Architecture & Optimization Engineer to push the limits of energy efficiency using advanced analytics and AI, including LLMs trained …