ASIC Verification Engineer
IND-Pune EON Kharadi Infrastructure
- Full time
- Regular
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IND-Pune EON Kharadi Infrastructure
Austin, Texas, United States +1 location
Pay posted by employer$139,300–$203,600
Bengaluru, India
India, Bengaluru
The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is committed …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center …
Armenia
We are hiring an ASIC Engineer to own standard cell layout for our next-generation ASICs on innovative FinFET and GAA nodes. You will …
US, TX, Austin
… human inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at …
US, TX, Austin
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… and work quickly. Join us to power the future of the digital world. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines. Serve as technical …
Armenia
… degree in Electrical Engineering, Computer Science, or a related field. 5+ years of hands-on experience in ASIC design and physical implementation. Proven track record in ASIC physical design and verification preferably …
Tel Aviv, Israel +1 location
… implementation feasibility. Support Hardware & Software Integration: Collaborate closely with digital ASIC design, firmware, and systems engineering teams to ensure accurate fixed-point translation and RTL …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 per year
We are seeking a hands-on Principal Digital Design Engineer to serve as the Chip Lead for our next-generation silicon projects. In this high-impact role, you will be …
San Jose, California, United States +2 locations
Pay posted by employer$143,800–$230,000 USD per year
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… more, and work quickly. Join us to power the future of the digital world. Your Impact Participate in the ASIC design verification for Cisco high-end switching products. Perform end-to-end verification of design blocks …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center …
US, CA, Santa Clara +3 locations
… join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… the future of the digital world. Your Impact: You will be in the Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA Engineer with strong analytical skills and a deep …
US, CA, Santa Clara
At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC …
India, Bengaluru
NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
You will support requirements capture and ASIC / FPGA digital architecture. You will implement ASIC / FPGA digital design using RTL. You will support …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.