431 matching jobs for “Signal Integrity Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Cisco Systems

Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

Kanata, Ontario, Canada

Pay posted by employer$223,100–$285,600

… days per week from our Ottawa office. Meet the Team Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission …

Added Oct 27, 2026

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Cisco Systems

Senior Analog/mixed-signal IC Designer - Acacia (Hybrid)

Kanata, Ontario, Canada

Pay posted by employer$171,100–$216,300

Added Oct 27, 2026

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Carrier Global

Hardware Engineer

PRT5208: Rua Rua Santos Dias No. 1121, Matosinhos, 4465-255, Portugal

Rol: Hardware Engineer Location: Matosinhos, Porto, Portugal Type of contract: permanent Carrier is the leading worldwide provider …

Added Oct 27, 2026

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Thermo Fisher Scientific

Staff Engineer, Electronics

Guangdong, China

Job Title: Staff Engineer, Electronics - HW Location: Guangzhou Reports to: Senior Manager, Manufacturing Engineering Group/Division …

Added Oct 16, 2026

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RTX

Lead Engineer

IN-KA-BENGALURU-NORTHGATE ~ Sy No 2/2 Venkatala Village ~ SY NO 2/2 VENKATALA VILLAGE, Yelahanka Hobli

… degree in Electronics/Electrical Engineering. Demonstrated working knowledge of Analog, Digital, and Mixed-Signal circuit design and analysis. Perform component selection and evaluation of alternate components for circuit …

Added Oct 27, 2026

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Cisco Systems

ASIC Engineer

Thalwil, Switzerland

… Lead design verification activities and write comprehensive simulation plans and test benches. Drive signal and power integrity for ASIC integration and guide design changes. Analyze and validate ASIC subsystems and …

Added Oct 27, 2026

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Intel

Platform Hardware design Engineer

Bengaluru, Karnataka, India

Position Overview: As a Platform Hardware Design Engineer, you will contribute to the end-to-end development of advanced platform hardware, translating platform …

Added Oct 27, 2026

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KLA

System Engineer

Westwood, MA

Full time
Regular

Pay posted by employer$150,500–$255,900 per year

… Haemek Industrial Park. Job Description/Preferred Qualifications As the lead applications and systems engineer for the capacitance gauging program you will become the domain expert in the application of capacitance …

Added Oct 15, 2026

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Cisco Systems

Hardware Engineer

Hsinchu, Taiwan, Taiwan +1 location

Added Oct 27, 2026

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Broadcom

Package Design Engineer

Singapore-Yishun

Full time
Regular

Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and RF/microwave …

Added Oct 5, 2026

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Arrow Electronics

Hardware Engineer

EG-Cairo, Egypt (Maadi Technology Park)

Full time
Regular

… drivers, power conversion, and protection concepts. * High Speed Board designing, Multi-layer Board design, Signal integrity. * Exposure working in both: Digital Design & Analog Design * Electromagnetic Interference (EMI) …

Added Oct 27, 2026

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Electrical Engineer

Austin, Texas, United States

Full time
Reg Employee

Pay posted by employer$116,150–$182,400 USD per year

… embedded systems. Strong expertise in PCB design and layout, schematic capture, component selection, signal integrity, power distribution, and system integration. Demonstrated experience designing products that can …

Added Oct 12, 2026

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Intel

Platform Hardware Design Engineer

Malaysia, Penang

… electrical requirements. • Conduct PCB layout and routing reviews, providing recommendations to improve signal integrity, power integrity, manufacturability, and overall design quality. • Generate and maintain …

Added Oct 27, 2026

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Intel

Hardware Engineer

Santa Clara, California, United States

Pay posted by employer$122,440–$232,190 USD per year

… plans. Interface and work collaboratively with mechanical engineers, optical engineers, Photonics engineer, firmware engineers, process engineers and test engineers. Design and coordinate with PI/SI engineers to …

Added Oct 27, 2026

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Broadcom

I/O Design Engineer

Singapore-Yishun

Full time
Regular

Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design and …

Added Oct 5, 2026

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GE HealthCare Technologies

Senior Electronics Design Engineer

IND19-01-Bengaluru-EPIP 122 (Phase II)

Summary We are seeking an experienced and highly motivated Senior Electronics Design Engineer to lead the design and development of advanced mixed-signal electronic assemblies for next-generation …

Added Oct 27, 2026

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Broadcom

Test Development Engineer

Singapore-Yishun 4 postings

Full time
Regular

Role Summary We are looking for a dedicated Test Development Engineer to lead the definition, architecture, and execution of test solutions for our NPI silicon programs. You …

Added Oct 27, 2026

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KLA

System Design Engineer

Milpitas, California, United States

Full time
Regular

Pay posted by employer$136,300–$231,700 per year

… fabrication process. Job Description/Preferred Qualifications We are seeking a highly motivated System Engineer to lead the development and integration of complex inspection, metrology, or advanced instrumentation …

Added Oct 15, 2026

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Broadcom

Package Design Engineer

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$82,500–$132,000 USD per year

Broadcom is seeking an IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power …

Added Oct 5, 2026

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Broadcom

Package Design Engineer

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$101,000–$162,000 USD per year

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power …

Added Oct 5, 2026

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Cisco Systems

Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

Kanata, Ontario, Canada

Pay posted by employer$223,100–$285,600

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Preferred Qualifications · employer excerpt

· Experience with electrical transceiver applications including backplane and cable communications.
· Experience in FinFET and GAA technologies.
· High-frequency layout experience including floorplaning (power/ground, digital/analog signal routing), passives components (inductors, transformers, and transmission-lins).
· Experience in design for manufacturability including characterization over PVT, electromigration analysis, self-heating, and IR drop analysis.
· Experience in laboratory validation including ESD practices/methodology and construction of test setups.

15 more in the full description below.

About this opportunity

Original employer description

The application window is expected to close on: 08/12/2026

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

This is a hybrid role that can be performed three days per week from our Ottawa office.

Meet the Team

Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.

You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the DSP ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth.

Your Impact

As a Principal member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed (>25Gb/s), and high accuracy, analog designs for optical communications products. You will lead the team in the areas architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products.

· You will lead efforts for a large block on a complex chip, mentor team members and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production.

· You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met.

· You are enthusiastic about developing high speed AMS circuits and best-in-class products that push the boundaries of what is possible. You are detail oriented, high energy and the drive to get things done and solve difficult problems.

· You are capable to figure things out by yourself, but you also participate in our friendly and team-oriented collaboration approach, which means you enjoy learning from your colleagues and letting them learn from you.

· You are not shy to always point out how we can be more effective as a team, and you are open to similar suggestions by your team members.

Minimum qualification:

· Bachelors + 15 years of related experience, or Masters + 10 years of related experience, or PhD + 7 years of related experience.

· Candidate must possess experience in the design, simulation, and measurement of high-speed ICs across at least three of the following areas: SerDes/serial links, output drivers, Phase Locked Loops (PLLs), clock distribution, Opamps/PGAs, or equalization techniques.

· Candidate must possess direct experience as a leader of a team working on high performance circuits..

Preferred Qualifications

· Experience with electrical transceiver applications including backplane and cable communications.

· Experience in FinFET and GAA technologies.

· High-frequency layout experience including floorplaning (power/ground, digital/analog signal routing), passives components (inductors, transformers, and transmission-lins).

· Experience in design for manufacturability including characterization over PVT, electromigration analysis, self-heating, and IR drop analysis.

· Experience in laboratory validation including ESD practices/methodology and construction of test setups.

· Experience in design software including Cadence (Virtuoso), Specture/APS/SpectreX, layout validation tools (Virtuoso and Calibre), EMX, mixed-signal simulations in AMS, and Matlab.

Cisco may use AI Tools to review candidate-provided details—such as skills, experience, location, and education—to determine how closely candidates match job criteria. AI Tools are intended to guide and support the recruitment team in identifying and prioritizing candidates but are not used in isolation or without human judgment. For more information about Cisco’s use of AI please see the Job Candidate Privacy Statement found here.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $223,100.00 to $285,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$250,600.00 - $416,900.00

Non-Metro New York state & Washington state:

$241,400.00 - $371,000.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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