Senior Engineer RTL Design
Ahmedabad, Gujarat, India +1 location
- Full time
- Regular
Principal Accountabilities * RTL development for ASIC / FPGA * Responsible for completion of front end design flow (spec to RTL / Netlist) * Design, micro …
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Ahmedabad, Gujarat, India +1 location
Principal Accountabilities * RTL development for ASIC / FPGA * Responsible for completion of front end design flow (spec to RTL / Netlist) * Design, micro …
Santa Clara, California, United States +3 locations
NVIDIA is seeking elite ASIC Infrastructure engineers to deliver the tooling and environment that enables DV and RTL Design for the …
Israel, Yokneam +2 locations
What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen …
Armenia
Drive the architecture, design, and implementation of high-performance ASIC subsystems and IP from specification through silicon …
Bengaluru, Karnataka, India
The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is …
Kyiv, Kyiv City, Ukraine +2 locations
What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen …
Santa Clara, California, United States
NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to …
Santa Clara, California, United States +2 locations
We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role, you will join a group …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production …
San Jose, California, United States
Pay posted by employer$121,900–$195,000 USD per year
Who We Are — Physical Design Team in APD Broadcom’s ASIC Products Division (APD) is the global leader in custom high-performance silicon …
Armenia
… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical …
Cedar Rapids, Iowa, United States
Develop and implement signal processing algorithms for FPGA or ASIC based systems. Utilize Simulink for modeling and simulation of signal processing systems and workflows. …
El Segundo, California, United States +1 location
Verification environment architecture and design using SystemVerilog with UVM/UVM-F Creation of written test plan, testcases, code coverage tracking, and …
Belgrade, Central Serbia, Serbia
Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major …
Petaẖ Tiqva, Central District, Israel
… product lines. We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization. Most of the team's engineers have 10+ years …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… us and help shape the future of aerospace and defense. We are seeking an experienced and highly motivated Senior Principal Electrical or Computer Engineer to support the design, development, and integration of advanced …
Tucson, Arizona, United States
… creating a safer, more secure world. Join us and help shape the future of aerospace and defense. As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: …
Tewksbury, Massachusetts, United States
… creating a safer, more secure world. Join us and help shape the future of aerospace and defense. As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: …
Bengaluru, Karnataka, India +1 location
… & Scope, Business Impact). Develop and optimize floorplans (macro placement, IO ring planning, power grid design, congestion/area/timing analysis) Execute place-and-route, clock tree synthesis, and timing closure using …
Santa Clara, California, United States
Pay posted by employer$164,470–$311,890 USD per year
About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end-to-end …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.