Principal Hypervisor Engineer
Cambridge, England, United Kingdom
- Full time
- Reg Employee
Design and implement all aspects of system level software such VMM/hypervisors, operating systems, device drivers …
Searching jobs…
Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Cambridge, England, United Kingdom
Design and implement all aspects of system level software such VMM/hypervisors, operating systems, device drivers …
Kulim, Kedah, Malaysia
… assembly needs and certify Surface Mount Technology (SMT) manufacturing for new Central Processing Unit (CPU), Chipset, System on Chip (SoC) BGA packages, and Socket Technology. The Surface Mount Technology …
Malaysia, Penang +1 location
Come join us to work on Intel's next generation Client CPU SoC with latest process technology in the era of hyper scale computing. This position involves validation …
Bengaluru, Karnataka, India
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our …
Santa Clara, California, United States
… GPUs and SoCs can hit the performance our customers depend on! We are hiring a Senior Memory Qualification Engineer inside the Silicon Co-Design Group who will own high-speed memory bring-up, characterization, and …
Hillsboro, Oregon, United States +1 location
Pay posted by employer$128,880–$245,160 USD per year
Join our Communication Runtimes team as a Senior Cloud Software Development Engineer to develop cutting-edge software features and optimizations for Intel's oneCCL (Collective Communications …
Santa Clara, California, United States
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our …
Taipei, Taipei City, Taiwan Region
… Strong understanding of Microsoft Windows architecture (x86 & ARM), component, driver and firmware design and requirements. Familiarity with hardware platforms from Intel, AMD, Qualcomm, and Nvidia. Strong …
PRC, Shanghai
The Role and Impact We are seeking a motivated Cloud Systems and Solutions Engineer to design and develop innovative cloud and AI systems that integrate software, firmware, board, and …
Lowe's Charlotte Technology Hub 3505
… learning (ML) models, including deep learning (DL) frameworks and large language models (LLMs). The Lead AI Engineer will be responsible for leading the advancement of model performance, implementing essential tools and …
Kraków, Poland
… through deep performance work, and sets Splunk's long-term performance standards through guidelines and design. We work where performance is won or lost: search and indexing hot paths, cache and bloomfilter efficiency, …
Santa Clara, California, United States
… for the manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible for building advanced test platforms for network device manufacturing and …
Santa Clara, California, United States
… As a key contributor in the Platform Hardware development team, you will be responsible for the complete design cycle of Palo Alto Networks hardware including: specification; component selection; schematic entry; layout …
Office - India - Bangalore Bagmane Tech Park
… everyday lives that are only enabled by a secure digital environment. Job Summary We are hiring a Principal Engineer Software to own the health, reliability, and release engineering of PA-VM, our virtualized next-generation …
Phoenix, Arizona, United States +3 locations
Pay posted by employer$122,440–$232,190 USD per year
… be joining the Intel Government Technologies Customer Engineering team as a Hardware Platform Applications Engineer (PAE). This is an exciting organization with a revamped roadmap looking to expand Intel's footprint into …
Hyderabad, India +1 location
Technical Leadership & Architecture: Lead the architectural design of resilient, hardware-agnostic gateway firmware, mentoring engineering teams and establishing embedded …
Kraków, Poland
… through deep performance work, and sets Splunk's long-term performance standards through guidelines and design. We work where performance is won or lost: search and indexing hot paths, cache and bloomfilter efficiency, …
Santa Clara, California, United States
… identifying root-cause of customer reported issues – Perform PCB-level debugging to isolate faults for physical FA. Investigate NVIDIA product failures and determine solutions through lab experimentation and …
Bengaluru, India
• Design, develop, and enhance software for Cisco's Nexus data center switching platforms. • Lead the implementation …
RTP, North Carolina, US
Pay posted by employer$115,800–$163,200
Design, build, and maintain the Circuit Desktop application for macOS and Windows using Electron (or Tauri) with …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.