Principal Engineer, Digital Design Engineering
Bengaluru, Karnataka, India
As an SoC Chip Lead, you will lead SoC execution from spec to silicon across domains. You will be responsible to …
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Bengaluru, Karnataka, India
As an SoC Chip Lead, you will lead SoC execution from spec to silicon across domains. You will be responsible to …
Bengaluru, Karnataka, India
Intel is seeking an experienced Logic Design engineer for the Intel Chassis Group, which is chartered to deliver the chassis for SoCs within Intel. The …
Bengaluru, Karnataka, India
… stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X . Staff Digital Design Engineer Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, …
Wilmington, Massachusetts, United States
Pay posted by employer$116,960–$160,820
… day-to-day block ownership. Key Responsibilities • Methodology Leadership: Drive improvements to physical design methodology, with a focus on flow standardization, reuse, execution efficiency, and more predictable design …
Pune, Maharashtra, India
… transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of cutting-edge IM/DD optics and silicon photonic platforms that enable customers to deploy …
Folsom, California, United States +2 locations
Pay posted by employer$164,470–$232,190 USD per year
… and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something …
Santa Clara, California, United States +1 location
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team …
Irvine, California, United States +1 location
… Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high …
Bengaluru, Karnataka, India
The Role and Impact Join a Team That Defines the Heartbeat of Next-Generation CPUs. As a CPU Senior Clock Design Engineer, you will contribute to the design, implementation, analysis, and optimization of clock …
Malaysia, Penang
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal and/or high-speed IPs required to …
Irvine, California, United States
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Principal, Digital IC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high …
Santa Clara, California, United States
… join the team and see how we can make a lasting impact on the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team! What you'll be doing : As a member of our Memory Subsystem …
Santa Clara, California, United States +4 locations
Pay posted by employer$220,920–$311,890 USD per year
… deliver power, performance, and scalability across future nodes and products. We're looking for a Principal Engineer who thrives on solving hard problems, someone who can bring deep circuit expertise and help define the …
Bengaluru, Karnataka, India
… company in the world! Your Impact Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of …
Hillsboro, Oregon, United States
Pay posted by employer$122,440–$172,860 USD per year
… leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for …
Malaysia, Penang +1 location
The Role and Impact As an E-Core (Atom) CPU Layout Design Engineer, you will play a pivotal role in shaping the physical layout of Intel's cutting-edge Atom …
USA - Huntsville, AL
Pay posted by employer$112,200–$151,800
Design high speed digital circuits and perform signal integrity analysis Focus on electronic systems and …
Malaysia, Penang
… CPU products. Whether you're a college graduate eager to launch your career or an experienced engineer ready to solve some of the industry's most complex technical challenges, you'll have the opportunity to …
Santa Clara, California, United States +2 locations
NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. …
China, Beijing, Haidian, Xixiaokou
Technical Leadership Lead block-level and chip-level digital architecture definition, RTL design, and implementation for digital SoCs. Drive key architecture and micro-architecture decisions, balancing …
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