Staff Design Verification Engineer · AnywhereEdit
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283 matching jobs for “Staff Design Verification Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Analog Devices

Staff Design Verification Engineer

Bengaluru, Karnataka, India 3 postings

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most …

Added Nov 3, 2026

Analog Devices

Staff Design Verification Engineer

CLOSED-India, Bangalore, Aveda Meta

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most …

Added Nov 3, 2026

GE Aerospace

Staff Engineer - FPGA Design/Verification

Grand Rapids, Michigan, United States +2 locations

  • Full time
  • Regular

Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. …

Added Oct 27, 2026

Analog Devices

Staff Engineer, Design Verification Engineering

Chandler, Arizona, United States

Pay posted by employer$172,390–$199,229 per year

… Learn more at www.analog.com and on LinkedIn and Twitter (X) . Employer: Analog Devices, Inc. Job Title: Staff Engineer, Design Verification Engineering Job Requisition: 1010.1197.6 / R262387 Job Location: Chandler, …

Added Nov 3, 2026

Analog Devices

Staff Physical Verification Engineer

Bengaluru, Karnataka, India

- Own full-chip and block-level physical verification signoff, including DRC, LVS, ERC, PERC and antenna/ESD checks for multiple complex SoCs. - Drive tape-out …

Added Nov 3, 2026

Broadcom

Staff IC Verification Engineer

Fort Collins, Colorado, United States +1 location

  • Full time
  • Regular

Pay posted by employer$109,700–$175,500 USD per year

… individuals to work in SoC and IP development programs. The candidate will be joining a high-performance design team responsible for state-of-the-art subsystem development to meet customer requirements for AI and …

Added Nov 3, 2026

Micron Technology

Staff Design Engineer

San Jose, California, United States

Pay posted by employer$145,000–$246,000 per year

… deliver required functionalities Participate in the conception and development of new circuits Define and design composition architecture specifications for new features. Support the creation of schematics and/or RTL …

Added Nov 3, 2026

Arrow Electronics

Design Verification Engineer (eInfochips Inc)

US-CA-San Jose, California

  • Full time
  • Regular

… with C knowledge Regression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to …

Added Oct 27, 2026

Arrow Electronics

Design Verification Engineer(eInfochips Inc)

US-CA-San Jose, California

  • Full time
  • Regular

Pay posted by employer$95,900–$149,600

… CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / …

Added Oct 27, 2026

Broadcom

Staff Design Engineer

Bengaluru, Karnataka, India

  • Full time
  • Regular

… position requires a breadth of disciplines and responsibilities in supporting the Processor based subsystem verification for the ‘ASIC Products Division’ within Broadcom Limited. Responsibilities will include Verification …

Added Oct 5, 2026

Broadcom

Staff Design Engineer

Bengaluru, Karnataka, India

  • Full time
  • Regular

Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, placement, …

Added Oct 5, 2026

Analog Devices

Staff Physical Design Engineer

Bengaluru, Karnataka, India

… 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine hierarchical PNR strategies, IO …

Added Nov 3, 2026

Analog Devices

Staff Physical Design Engineer

CLOSED-India, Bangalore, Aveda Meta

… 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine hierarchical PNR strategies, IO …

Added Nov 3, 2026

Intel

Staff Logic Design Engineer

Malaysia, Penang 2 postings

… motivated engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build …

Added Oct 27, 2026

Thermo Fisher Scientific

Staff Engineer, Systems Design

Singapore, Singapore

… environment, making sure our food is safe or helping find cures for cancer. DESCRIPTION: Join our team as a Staff Engineer, Systems Design at Thermo Fisher Scientific, where you'll contribute to innovation in scientific …

Added Oct 16, 2026

Thermo Fisher Scientific

Staff Engineer Systems design

Hyderabad, Telangana, India

… making sure our food is safe or helping find cures for cancer. Position Summary We are seeking a Staff Systems Engineer to join a growing R&D team in Hyderabad supporting sustaining engineering, VAVE, and …

Added Oct 16, 2026

Analog Devices

Staff Engineer, Analog Design

Bengaluru, Karnataka, India

… with a bright future. This is an excellent opportunity to join a high performing team, working on the design of the next generation of automotive BMS chips. The designs include industry-leading low power radio …

Added Nov 3, 2026

KLA

Staff Systems Design Engineer

Milpitas, California, United States

  • Full time
  • Regular

Pay posted by employer$186,200–$273,067 per year

… high-impact work across your area of expertise. We are seeking an experienced and highly influential Staff System Design Engineer to lead the architecture, development, and performance delivery of next-generation …

Added Oct 15, 2026

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.

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